Interrupts: Difference between revisions
Jump to navigation
Jump to search
mNo edit summary |
mNo edit summary |
||
| Line 8: | Line 8: | ||
Most interrupts are used in a "I, this hardware, really require attention very soon, and don't want to wait for the CPU to think about us existing and [[polling]] us" way, which are very temporary, and not faults. | Most interrupts are used in a "I, this hardware, really require attention very soon, and don't want to wait for the CPU to think about us existing and [[polling]] us" way, which are very temporary, and not faults. | ||
(note that it is the interrupt handler that tends to make this a "I store things so I can restore regular operation later"), which it has to do fairly explicitly) | |||
Interrupts ''can'' also be used to signal problems that we probably ''should'' consider fatal errors, particularly if there is value to do so sooner rather than later. | Interrupts ''can'' also be used to signal problems that we probably ''should'' consider fatal errors, particularly if there is value to do so sooner rather than later. | ||
| Line 33: | Line 34: | ||
Interrupts were intially a bit of a hack, and while perfectly serviceable, | Interrupts were intially arguably a bit of a hack, and while perfectly serviceable, | ||
you can imagine that using a lot of hardware lines is both messy and somewhat inefficient in a way you have little control over. | you can imagine that using a lot of hardware lines is both messy and somewhat inefficient in a way you have little control over. | ||
| Line 45: | Line 46: | ||
https://en.wikipedia.org/wiki/Message_Signaled_Interrupts | https://en.wikipedia.org/wiki/Message_Signaled_Interrupts | ||
| Line 53: | Line 57: | ||
:: that basically has the job of holding that 8086's NMI pin high as long as something is bothering the PIC | :: that basically has the job of holding that 8086's NMI pin high as long as something is bothering the PIC | ||
:: the 8086 will still have to know how to talk to the PIC | :: the 8086 will still have to know how to talk to the PIC | ||
These days we use a later variant the [https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller APIC], which is often integrated. | |||
If you want to get a feel for interrupts (including details with how to best write a handler, how to trigger, potentially issues with spurious interrupts, sharing), consider playing with various microcontrollers - they tend to expose a few hardware interrupts. | |||
Interrupts you may see defined by the hardware or kernel include | |||
* a timer (which is only ''relatively'' regular) | |||
* System Management Interrupt - the way to enter System Management Mode | |||
* Rescheduling interrupts | |||
* Thermal event interrupts | |||
* function call interrupts - one CPU to another (via APIC, not hardware line) | |||
* TLB shootdowns - the OS telling processors to invalidate a mapping in their caches [https://stackoverflow.com/questions/3748384/what-is-tlb-shootdown] (to keep each core's TLB in sync with the others) | |||
--> | --> | ||
Latest revision as of 12:45, 17 October 2023
✎ This article/section is a stub — some half-sorted notes, not necessarily checked, not necessarily correct. Feel free to ignore, or tell me about it.