Some understanding of memory hardware

The lower-level parts of computers General: Computer power consumption · Computer noises Memory: Some understanding of memory hardware · CPU cache · Flash memory · Virtual memory · Memory mapped IO and files · RAM disk · Memory limits on 32-bit and 64-bit machines Related: Network wiring notes - Power over Ethernet · 19" rack sizes Unsorted: GPU, GPGPU, OpenCL, CUDA notes · Computer booting

"What Every Programmer Should Know About Memory" is a good overview of memory architectures, RAM types, reasons bandwidth and access speeds vary.

RAM types

This article/section is a stub — probably a pile of half-sorted notes and is probably a first version, is not well-checked, so may have incorrect bits. (Feel free to ignore, or tell me)

DRAM - Dynamic RAM

lower component count per cell than most (transistor+capacitor mainly), so high-density and cheaper

yet capacitor leakage means this has to be refreshed regularly, meaning a DRAM controller, more complexity and higher latency than some

(...which can be alleviated and is less of an issue when you have multiple chips)

this or a variant is typical as main RAM, due to low cost per bit

SDRAM - Synchronous DRAM - is mostly a practical design consideration

...that of coordinating the DRAM via an external clock signal (previous DRAM was asynchronous, manipulating state as soon as lines changed)

This allows the interface to that RAM to be a predictable state machine, which allows easier buffering, and easier interleaving of internal banks

...and thereby higher data rates (though not necessarily lower latency)

SDR/DDR:

DDR doubled busrate by widening the (minimum) units they read/write (double that of SDR), which they can do from single DRAM bank(verify)

similarly, DDR2 is 4x larger units than SDR and DDR3 is 8x larger units than SDR

DDR4 uses the same width as DDR3, instead doubling the busrate by interleaving from banks

unrelated to latency, it's just that the bus frequency also increased over time.

SRAM - Static RAM

Has a higher component count per cell (6 transistors) than e.g. DRAM

Retains state as long as power is applied to the chip, no need for refresh, also making it a little lower-latency

no external controller, so simpler to use

e.g used in caches, due to speed, and acceptable cost for lower amounts

PSRAM - PseudoStatic RAM

A tradeoff somewhere between SRAM and DRAM

in that it's DRAM with built-in refresh, so functionally it's as standalone as SRAM and slower but you can have a bunch more of it for the same price - e.g. SRAM tends to

(yes, DRAM can have built-in refresh, but that's often points a sleep mode that retains state without requiring an active DRAM controller)

Non-volatile RAM

While concept of Random Access Memory (RAM) only tells you that you can access any part of it with comparable ease (contasted with e.g. tape storage, where more distance meant more time, so more storage meant more time), we tend to think about RAM as volatile, only useful as an intermediate scratchpad between storage and use, and will lose its contents as soon as it is unpowered

This is perhaps because the simplest designs (and thereby cheapest per byte) have that property. For example, DRAM loses its charge and has to be constantly and actively refreshed, DRAM and SRAM and many others lose their state once you remove power.

(There are also exceptions and inbetweens, like DRAM that doesn't need its own controller and can be told to refresh itself in a low-power mode, which acts more like SRAM).

Yet there are various designs that are both easily accessible and keep their state.

And there is a gliding scale of various properties in that area as well.

We may well call it NVM (non-volatile memory) when we haven't yet gotten to some more specific properties, like how often we may read or write, or how difficult that is.

Say, some variants of EEPROM aren't the easiest to deal with. We like Flash a whole lot better, even though it's basically a development from EEPROM. But both wear out.

NVRAM on the other hand tends to be easier, more reisable, like FRAM, MRAM, and PRAM, or nvSRAM or even BBSRAM.

nvSRAM - SRAM and EEPROM stuck on the same chip.

seems intended as a practical improvement on BBSRAM

and/or a "access quickly, occasionally write a chunk to EEPROM" style of data logging, black boxes, that sort of thing

https://en.wikipedia.org/wiki/NvSRAM

BBSRAM - Battery Backed SRAM

basically just SRAM alongside a lithium battery, so that it'll live a good while

feels like cheating, but usefully so.

FRAM - Ferroelectric RAM

functions more like flash, also limited with use (but with many more cycles)

read process is destructive (like e.g DRAM), so you need a write-after-read to keep data around

so it's great for things like constant logging, which would be terrible for Flash

https://electronics.stackexchange.com/questions/58297/whats-the-catch-with-fram

PRAM

https://en.wikipedia.org/wiki/Phase-change_memory

DRAM stick types

This article/section is a stub — probably a pile of half-sorted notes and is probably a first version, is not well-checked, so may have incorrect bits. (Feel free to ignore, or tell me)

ECC RAM

can detect many (and correct some) hardware errors in RAM

The rate of of bit-flips is low, but will happen. If your computations or data are very important to you, you want ECC.

See also:

http://en.wikipedia.org/wiki/ECC_memory

DRAM Errors in the Wild: A Large-Scale Field Study

Registered RAM (sometimes buffered RAM) basically places a buffer on the DRAM modules (register as in hardware register)

offloads some electrical load from the main controller onto these buffers, making it easier to have designs more stably connect more individual memory sticks/chips.

...at a small latency hit

typical in servers, because they can accept more sticks

Must be supported by the memory controller, which means it is a motherboard design choice to go for registered RAM or not

pricier (more electronics, fewer units sold)

because of this correlation with server use, most registered RAM is specifically registered ECC RAM

yet there is also unregistered ECC, and registered non-ECC, which can be good options on specific designs of simpler servers and beefy workstations.

sometimes called RDIMM -- in the same context UDIMM is used to refer to unbuffered

https://en.wikipedia.org/wiki/Registered_memory

FB-DIMM, Fully Buffered DIMM

same intent as registered RAM - more stable sticks on one controller

the buffer is now between stick and controller [1] rather than on the stick

physically different pinout/notching

SO-DIMM (Small Outline DIMM)

Physically more compact. Used in laptops, some networking hardware, some Mini-ITX

EPP and XMP (Enhanced Performance Profile, Extreme Memory Profiles)

basically, one-click overclocking for RAM, by storing overclocked timing profiles

so you can configure faster timings (and V_dimm and such) according to the modules, rather than your trial and error

normally, memory timing is configured according to a table in the SPD, which are JEDEC-approved ratings and typically conservative.

EPP and XMP basically means running them as fast as they could go (and typically higher voltage)

In any case, the type of memory must be supported by the memory controller

DDR2/3/4 - physically won't fit

Note that while some controllers (e.g. those in CPUs) support two generations, a motherboard will typically have just one type of memory socket

registered or not

ECC or not

Historically, RAM controllers were a thing on the motherboard near the CPU, while there are now various cases where the controller is on the CPU.

More on...

DRAM versus SRAM

This article/section is a stub — probably a pile of half-sorted notes and is probably a first version, is not well-checked, so may have incorrect bits. (Feel free to ignore, or tell me)

EPROM, EEPROM, and variants

PROM is Programmable ROM

can be written exactly once

EPROM is Erasable Programmable ROM.

often implies UV-EEPROM, erased with UV shone through a quartz window.

EEPROM's extra E means Electrically Erasable

meaning it's now a command.

early EEPROM read, wrote, and erased (verify) a single byte at a time. Modern EEPROM can work in larger chunks.

you only get a limited amount of erases (much like Flash. Flash is arguably just an evolution of EEPROM)

Flash memory (intro)

This article/section is a stub — probably a pile of half-sorted notes and is probably a first version, is not well-checked, so may have incorrect bits. (Feel free to ignore, or tell me)