Some understanding of memory hardware

The lower-level parts of computers

General: Computer power consumption · Computer noises

Memory: Some understanding of memory hardware · CPU cache · Flash memory · Virtual memory · Memory mapped IO and files · RAM disk · Memory limits on 32-bit and 64-bit machines

Unsorted: GPU, GPGPU, OpenCL, CUDA notes · Computer booting

"What Every Programmer Should Know About Memory" is a good overview of memory architectures, RAM types, reasons bandwidth and access speeds vary.

RAM types

✎ This article/section is a stub — some half-sorted notes, not necessarily checked, not necessarily correct. Feel free to ignore, or tell me about it.

DRAM - Dynamic RAM

lower component count per cell than most (transistor+capacitor mainly), so high-density and cheaper

yet capacitor leakage means this has to be refreshed regularly, meaning a DRAM controller, more complexity and higher latency than some

(...which can be alleviated and is less of an issue when you have multiple chips)

this or a variant is typical as main RAM, due to low cost per bit

SDRAM - Synchronous DRAM - is mostly a practical design consideration

...that of coordinating the DRAM via an external clock signal (previous DRAM was asynchronous, manipulating state as soon as lines changed)

This allows the interface to that RAM to be a predictable state machine, which allows easier buffering, and easier interleaving of internal banks

...and thereby higher data rates (though not necessarily lower latency)

SDR/DDR:

DDR doubled busrate by widening the (minimum) units they read/write (double that of SDR), which they can do from single DRAM bank(verify)

similarly, DDR2 is 4x larger units than SDR and DDR3 is 8x larger units than SDR

DDR4 uses the same width as DDR3, instead doubling the busrate by interleaving from banks

unrelated to latency, it's just that the bus frequency also increased over time.

Graphics RAM refers to varied specialized

Earlier versions would e.g. allow reads and writes (almost) in parallel, making for lower-latency framebuffers

"GDDR" is a somewhat specialized form of DDR SDRAM

SRAM - Static RAM

Has a higher component count per cell (6 transistors) than e.g. DRAM

Retains state as long as power is applied to the chip, no need for refresh, also making it a little lower-latency

no external controller, so simpler to use

e.g used in caches, due to speed, and acceptable cost for lower amounts

PSRAM - PseudoStatic RAM

A tradeoff somewhere between SRAM and DRAM

in that it's DRAM with built-in refresh, so functionally it's as standalone as SRAM and slower but you can have a bunch more of it for the same price - e.g. SRAM tends to

(yes, DRAM can have built-in refresh, but that's often points a sleep mode that retains state without requiring an active DRAM controller)

On ECC

Buffered/registered RAM

EPROM, EEPROM, and variants

PROM is Programmable ROM

can be written exactly once

EPROM is Erasable Programmable ROM.

often implies UV-EEPROM, erased with UV shone through a quartz window.

EEPROM's extra E means Electrically Eresable

meaning it's now a command.

early EEPROM read, wrote, and erased (verify) a single byte at a time. Modern EEPROM can work in alrger chunks.

you only get a limited amount of erases (much like Flash. Flash is arguably just an evolution of EEPROM)

Flash memory (intro)